1. Technical Field
An embodiment of the invention relates generally to processors, e.g., computer processors, and in particular relates to speculative execution (executing with a predicted value rather than the actual value) of load instructions.
2. Description of the Related Art
Load instructions typically retrieve the load data from a data cache before placing the data in a register. Although the load instruction itself may be available from an instruction cache, the data cache might not contain the requested load value, resulting in a cache miss. Execution of the load instruction will be delayed while waiting for the missing cache line to be retrieved from main memory or a lower-level cache, and any associated load-dependent instructions also have to wait until after the load instruction completes execution. Load-dependent instructions are instructions that directly or indirectly use the load value after it has been loaded by the load instruction. If multiple loads are stalled in this manner, and all the associated load-dependent instructions are waiting, the execution unit can come to a virtual standstill. Speculatively executing the load and load-dependent instructions using a predicted load value is a partial solution to this problem, but conventional systems cannot retire the speculatively-executed load instruction until the prediction is verified by retrieving the actual load value. This can cause the retirement unit to bog down, which can eventually stall the entire machine.